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Setting Data Transfer Timing

This section defines the mechanism used by version 3.0 and later of the ATA Manager to setup and adjust the system hardware and software for optimized data transfers from and to the ATA devices.

Beginning with version 3.0 of the ATA Manager, all cycle timing for data transfer is accomplished through the ATA_SetDevConfig function. The timing values in the ataPIOSpeedMode field (used by ATA Manager version 2.0 to set cycle timing) in the parameter block header are ignored, and PIO, singleword DMA, and multiword DMA data transfer times are specified separately in the ATA_SetDevConfig function parameter block. In addition, minimum cycle times are determined for PIO and multiword DMA transfers with the ATA_SetDevConfig function.

The ATA-2 specification requires that ATA devices report cycle timing requirements and transfer mode information through the ATA Identify Device command. In order to synchronize the system ATA controller speed to the device speed, the Identify Device information must be interpreted by the ATA Manager. The ATA Manager receives the necessary information from the client in the ATA_SetDevConfig function. Five fields in the ATA_SetDevConfig parameter block are used in various combinations to specify the timing and transfer mode values for PIO, multiword DMA, and singleword DMA data transfers.

Setting Up PIO Data Transfers

Setting Up Multiword and Singleword DMA Data Transfers

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